The disclosed embodiments of the present disclosure relate to a transceiver, and more particularly, to a transceiver having an RXADC and a TXDAC which share the same embedded DAC unit of the RXADC.
In a traditional baseband analog-to-digital conversion/digital-to-analog conversion (ADC/DAC) architecture, individual RXADC and TXDAC are required. Since uplinks and downlinks of communications are separated when being applied to a time-domain duplex (TDD) system, the RXADC and TXDAC of the ADC/DAC architecture need not operate simultaneously.
FIG. 1 is a diagram illustrating a conventional transceiver 100. The conventional transceiver 100 includes an RXADC 110 and a TXDAC 120. Herein the RXADC 110 is used for converting an analog input signal SAIN into a digital output signal SDOUT, and the TXDAC 120 is used for converting a digital input signal SDIN into an analog output signal SAOUT. The RXADC 110 can be implemented by a successive-approximation register (SAR) ADC. As one can know, the SAR ADC is a type of analog-to-digital converter that converts an analog input signal (e.g., SAIN) into a digital code via a binary search through all possible quantization levels before finally converging upon a digital output signal SDOUT. Since operations of the SAR ADC are already well-known to a person of average skill in the pertinent art, therefore, additional description is omitted here for brevity. Asone can know, individual DAC units are required for the RXADC 110 and the TXDAC 120 of the conventional transceiver 100 since they are separate components.
However, a DAC unit usually occupies a large layout area. In addition, the DAC unit of the RXADC 110 and the DAC unit of the TXDAC 120 need not operate simultaneously when being applied to a TDD system, as a result, one of these two DAC units is idle when transmitting signals or receiving signals. A novel architecture is therefore demanded for considerations of layout area and cost.